Digital Logic Fundamentals
Undergraduate
Undergraduate
EEET 1026
Undergraduate
Yes
Note: This offering may or may not be scheduled in every study period. Please refer to the timetable for further details.
151842
4.5
No
UniSA STEM
To develop knowledge and skills in the fundamentals of digital logic design and optimisation.
Evolution of computers and impact on society: different types of computers; essential parts of a computer. Analogue versus digital representation of physical quantities; digital signals.
Language of computers: binary number system; decimal and hexadecimal representations; decimal and binary codes; introduction to binary logic.
Boolean algebra: definitions, theorems and properties; Boolean functions; logic operations, basic logic gates, truth tables; representing Boolean equations using logic gates and vice versa.
Simplification of Boolean functions: algebraic and Karnaugh map methods; NAND and NOR implementations; equivalent gate representations; active logic states; enabling/disabling logic circuits.
Decoders, encoders, multiplexers, demultiplexers and their applications; seven-segment displays and decoders. Unsigned and signed arithmetic; overflow condition; design of arithmetic circuits.
Flip-flops and sequential logic circuits: counters and registers. MSI Logic Circuits and Programmable Logic Devices.
Putting it all together: systematic design and synthesis of digital sub-systems using Computer Aided Design tools.
Ronald J. Tocci, Neal S. Widmer and Gregory L. Moss 2018, Digital Systems: Principles and Applications, 12th edition, Pearson Higher Education, USA
Electrical and Electronic Systems (EEET 1027) or Electrical Circuit Analysis (EEET 1003)
Nil
Component | Duration | ||
---|---|---|---|
INTERNAL, MAWSON LAKES | |||
Lecture (introduce principles and concepts) | 2 hours x 13 weeks | ||
Lecture (in week 2 only) | 2 hours x 1 week | ||
Tutorial (reinforce principles and concepts through problem solving and quiz) | 2 hours x 12 weeks | ||
Practical (develop practical skills in contsructing and testing simple logic circuits ) | 2 hours x 12 weeks | ||
EXTERNAL, MAWSON LAKES, ONLINE | |||
External | N/A x 13 weeks | ||
Workshop (Compulsory attendance at Mawson Lakes Campus) | N/A x 3 days |
Note: These components may or may not be scheduled in every study period. Please refer to the timetable for further details.
Reflection, Skills demonstration, Test/Quiz
EFTSL*: 0.125
Commonwealth Supported program (Band 2)
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Fee-paying program for domestic and international students
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Non-award enrolment
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* Equivalent Full Time Study Load. Please note: all EFTSL values are published and calculated at ten decimal places. Values are displayed to three decimal places for ease of interpretation.