Advanced Digital and RF Systems

Course aim

To assist students in developing the knowledge and skills to design combinational and sequential digital systems using modern electronic design flow, and to apply relevant design considerations and constraints

Course content

Integrated-Circuit Logic Families – TTL and CMOS. Combinational and arithmetic logic design – priority encoders, parity checkers, unsigned and signed binary adders, subtractors and multipliers; reducing delay using enhanced carry propagation techniques; timing specification and timing hazards. Design of synchronous and asynchronous digital circuits – set up and hold times, clock skew. State machine based design techniques – ASM chart, timing issues, data and control aspects of ASM design procedures. Digital system design with hardware description languages; programmable implementation technologies; electronic design automation flows; design considerations and constraints; design for test.

Textbook(s)

John F. Wakerly 2006, Digital Design: Principles and Practices, 4th edition, Prentice Hall, USA

Stephen Brown and Zvonko Vranesic 2009, Fundamentals of Digital Logic with VHDL Design, 3rd edition, McGraw Hill, USA

Prerequisite(s)

Nil

Corequisite(s)

Nil

Teaching method

Note: These components may or may not be scheduled in every study period. Please refer to the timetable for further details.

Assessment

Continuous assessment, e-portfolio, Examination, Practical

Fees

EFTSL*: 0.125
Commonwealth Supported program (Band 2)
To determine the fee for this course as part of a Commonwealth Supported program, go to:
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Fee-paying program for domestic and international students
International students and students undertaking this course as part of a postgraduate fee paying program must refer to the relevant program home page to determine the cost for undertaking this course.

Non-award enrolment
Non-award tuition fees are set by the university. To determine the cost of this course, go to:
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Not all courses are available on all of the above bases, and students must check to ensure that they are permitted to enrol in a particular course.

* Equivalent Full Time Study Load. Please note: all EFTSL values are published and calculated at ten decimal places. Values are displayed to three decimal places for ease of interpretation.