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Area/Catalogue
EEET 4045

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Course Level
Undergraduate

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Offered Externally
No

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Course ID
013401

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Unit Value
4.5

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University-wide elective course
No

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Timetable/s

Second Semester
(Study Period 5)
Course owner

Course owner
School of Engineering

Course aim

To assist students in developing the knowledge and practice-based skills to design Very Large Scale Integrated (VLSI) circuits and systems using modern nanoscale CMOS technologies.

Course content

VLSI technology trend: modern nanometer CMOS technologies – performance, impact and challenges; typical CMOS process technology masks and design rules; modelling and analysis of integrated circuits using SPICE – MOS model parameters; NMOS and CMOS logic families; static CMOS logic design: inverter example – device sizing, inversion voltage, noise margin, delay and power; design and analysis of combinational and sequential CMOS building blocks: performance issues and optimisation techniques; interconnects and process variability; cell-based system design: floor planning; datapaths; design for testability; modern computer aided design (CAD) tools to design and analyse custom CMOS integrated circuits.

Textbook(s)

Weste, N & Harris, D. 2011, Integrated Circuit Design, 4, Pearson, Boston

Prerequisite(s)

Common to all relevant programs
Subject Area & Catalogue Number Course Name
EEET 2018 Electronic Devices and Circuits

Corequisite(s)

Nil

Teaching method

Component Duration
INTERNAL, MAWSON LAKES
Lecture 2 hours x 13 weeks
Computer Practical 2 hours x 13 weeks
INTERNAL, OFFSHORE, KAPLAN HIGHER EDUCATION - SINGAPORE (INTENSIVE)
Offshore 20 hours x 1 week

Note: These components may or may not be scheduled in every study period. Please refer to the timetable for further details.


Assessment

Task Length Weighting Duration
INTERNAL, MAWSON LAKES
Practical projects 1500 words 45% N/A
Class tests 1000 words 15% N/A
Examination 1500 words 40% N/A
INTERNAL, OFFSHORE, KAPLAN HIGHER EDUCATION - SINGAPORE (INTENSIVE)
Practical projects 1500 words 45% N/A
Examination 1500 words 55% N/A

Fees

EFTSL*: 0.125
Commonwealth Supported program (Band 2)
To determine the fee for this course as part of a Commonwealth Supported program, go to:
How to determine your Commonwealth Supported course fee. (Opens new window)

Fee-paying program for domestic and international students
International students and students undertaking this course as part of a postgraduate fee paying program must refer to the relevant program home page to determine the cost for undertaking this course.

Non-award enrolment
Non-award tuition fees are set by the Division offering the course. To determine the cost of this course, go to:
How to determine the relevant non award tuition fee. (Opens new window)

Not all courses are available on all of the above bases, and students must check to ensure that they are permitted to enrol in a particular course.

* Equivalent Full Time Study Load. Please note all EFTSL values are published and calculated at ten decimal places. Values are displayed to three decimal places for ease of interpretation

Course Coordinators

Mr Duc Pham
Mr Duc Pham arrow-small-right
School of Engineering

Degrees this course is offered in

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